This concept’s semantic web URI is: [
http://sw.opencyc.org/2008/06/10/concept/en/HardwareBusGraphicsSubSystem
]
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Hardware bus graphics sub system
Unique Tag: [
HardwareBusGraphicsSubSystem
]
This collection specifies all of the bus imlementations that have been built with the specific intent of high throughput on the graphics output. This includes memory access optimizations
And
block transfer abilities.
More General:
Interrnal bus
Hardware bus graphics sub system
is an Example of:
Computer hardware device type
Kind of artifact not distinguished by brand or model
Spatially disjoint object type
Type of object
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